Self-motivated, dynamic management professional with diverse credentials which combine solid, tactical leadership and human resources expertise with a strong background, an ability to work collaboratively, and a commitment to achieving organizational goals. Joined Aryan Search Pte Ltd. in February July 2016. It has been an absolute pleasure working with Aryan Search. Maintained full Recruitment Cycle for the effective and efficient staffing of Singapore and Malaysia. Responsible for the delivery of candidates across different verticals (Software Development and Quality Assurance verticals) and handling application account which includes Mid-Level human resources (Developers, Testers, Architects). Superior ability to assemble talented teams and devise effective recruiting strategies, coupled with strong negotiation and problem-solving skills.
Salary 1200000 - 1500000 MYR
Number of positions to fill : 1
Reference number : 8470
We are looking for a VLSI Consultant (Designing & Testing) for a permanent role for one of our client in Malaysia
Salary: MYR 10,000 – 12,500
SoC Design Verification
Working experience in SoC verification including but not limited to testplan development, test writing, debug, integration and familiar with verification methodologies such as OVM, UVM
Pre-silicon functional verification w/ strong system Verilog, OVM/UVM Knowledge and random-constrained, coverage-driven techniques
Assertion Based Verification - Development of framework, Assertions and Debug.
Tools - VCS / NCSim.
Ability to understand the domain and module through specs and relate to the trackers/ waveforms
Debug using Waveform, Trackers, Breakpoints .
The below would be desirable skills
SOC Verification skillset inclusive of knowledge of Fuse Manager / Interrupt Manager/ Interconnect Bus protocols / System Manager
2.Functional coverage - framework development, coverage regression and coverage analysis.
Exposure to Version Control tools - preferably GIT.
4..Knowledge and implementation skills on constraint random verification approach
Debugging expertize /know how on tyical error scenarios - such as NOA, XMRE(cross module reference) , hanging simulations , scoreboard errors
6 Protocol Knowledge on any of the below areas would be a plus : SATA, PCIe, USB, Interfaces : I2C, SPI, UART
Physical Design Over all experience of 3 to 7 years in physical design
Education Background with VLSI skills ( Engineering Degree in Electronics & Communication or Electrical
Hands on working exposure to Synthesis and/or Custom/Partition/Block level Physical design .
Exposure to Design Compiler, IC Compiler , Z Route, Timing using PT/PTSI, Physical verification DRC,LVS
Should have gone through one or more tape outs in 14nm or 22nm and beyond
Knowledge on the below areas is required
Synopsys Tools (ICC , DC, PT)
PnR and Physical Verification
Std cell placement.
Timing driven methodologies for better QoR
Routing and optimizations.
Maxcap / Maxtrans Fixes..
Partition Level Timing Debugging and fixing using PTSI
LVS, DRC, ANT & Density problems
Interested, please send over your resume to email@example.com or call at +65 67087429 – 201 for a confidential discussion.
EA PERSONNEL: SHERVANI VIKRAM
EA REGISTRATION NUMBER: R1110177
LICENSEE: ARYAN SEARCH PTE LTD / LICENSE NO. 13C6405
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